Designing an 8 Bit ALU using VHDL Software

DESIGN AND IMPLEMENTATION OF 8 BIT ALU USING VHDL

 

 

PURPOSE: The purpose of the project is to design an 8 Bit ALU using VHDL software.
 
THEORY: The ALU is a device that can be used to perform Arithmetic and Logical operations on the binary data. Arithmetic Logic Unit (ALU) performs arithmetic and a logic operation is a digital circuit. ALU perform the simplest of the microcontroller, the most complex of all processors to construct a computer microprocessor. In modern computer graphics cards within the microprocessor and are very complex and powerful ALU. The proposed device can accept two numbers of 8 bit binary data and can perform logical/arithmetic operation depending on the control signal. It is proposed to give 4-bit binary controlled signal and so eight different operations are performed.
 
HARDWARE:


The 8 bit ALU consists of:
1. 8 Bit Adder/Subtractor with Arithmetic and Logic Extenders
• Full Adder
 

 

2. 8 Bit Arithmetic and 8 Bit Logic Extenders
3. Shifter
• 4 Bit Multiplexer

SOFTWARE:
                Using VHDL software tool, a digital system can be designed and simulated. Also the Timings of various signals can be verified. Then the system I implemented in using Xilinx ISE 9.2i.


 

Cargo Control System

Cargo Control System

Project Description

In this project, our aim is create a cargo management system. This system will be used to supply co ordination between storage and transportation depertmants of cargo companies. In addition the system can be used by the T.I.R drivers and their manager, storage employees and their department manager, general manager.

Also stuff that ordered by customers’ are accepted and this stuffs are located according to their destination  address in this system. And this destination address’ are grouped according to their route. This process is done before loading at the storage.

After this process, stuffs are loaded into trucks in agreement with their destination by the loading employees.

And drivers are directed to trucks according to driver id given by driver’s department manager. These manager has to make schedulings with respect to working days of drivers.

In this system we have 7 entities which are interact with each other but indepent from each other. And any user of the company can access the whole list of the searched data,its data of relations.  Together with this case whole department managers have also permission to make changes on its own authorization areas.

We decided to use the linear process model in our project.

 

Class Diagram

Context Diagram

 

Sequence Diagram

 

Recursively Enumerable Languages/Unrestricted Grammars

Recursively Enumerable Languages/Unrestricted Grammars 

Construct one unrestricted grammar each that generates exactly one of the following languages:

• G₁(L₁={aⁿbⁿ | 1≤n})        N = {S, A, B}         E = {a, b}

S à aAb

A à aAB

B à aB

Bb à bb

• G₂(L₂={aⁿbⁿcⁿ | 1≤n})       N = {S, A, B, C}        E = {a, b, c}

S à aSBC

CB à BC

aB à ab

bB à bb

bC à bc

cC à cc

• G₃(L₃={aⁿbⁿcⁿdⁿ | 1≤n})       N = {S, A, B, C, T}      E = {0, 1, 2}

 S à ABCDS 

S à TD 

DA à AD

DB à BD 

DC à CD 

CB à BC 

DTD à TDd 

TD à TC 

CTC à TCc 

TC à TB 

BTB à TBb 

TB à TA 

ATA à TAa 

TA à ∑

 

• G₄(L₄={0ⁱ1^j | 0<i<j})          N = {S, A, B, T}         E = {0, 1}

S à ABS

S à TB

BA à AB

BTB à TB1

TB à TA

ATA à TA0

TA à ∑

• G₅(L₅={0ⁱ1^j2^k | 0<i<j<k})      N = {S, A, B, C, T}     E = {0, 1, 2}

S à ABCS

S à TC

CA à AC

BA à AB

CB à BC

CTC à TC2

TC à TB

BTB à TB1

TB à TA

ATA à TA0

TA à ∑

Context-Free Languages/Grammars

Context-Free Languages/Grammars

Construct one context-free grammar each that generate exactly one of the following languages:

• G₁(L₁={0^a1^b0^c | 0≤a<b ∧ c=b-a}) = G(N=?, E=?, S=?, P=?)

N =  { S, A, B }

E = { 0, 1 }

S à AB

A à  ∑ | 0A1

B à 1B0 | 10

 

• G₂(L₂={0^c1^b0^a | 0≤a<b ∧ c>b-a}) = G(N=?, E=?, S=?, P=?)

N = {S, A, B}

E = { 0, 1 }

S à ABC

A à 0A | ∑

B à 1B0 | 10

C à ∑ | 0C1

 

• G₃(L₃={0(1+0)^*1}) = G(N=?, E=?, S=?, P=?)

N =  { S, A, B, C }

E = { 0, 1 }

S à 0A1

A à ∑ | 10A | 1A | 0A | 01A

 

 

• G₄(L₄={0(1⁺+0⁺)^*1}) = G(N=?, E=?, S=?, P=?)

N =  { S, A, B, C }

E = { 0, 1 }

S à 0A1

A à ∑ | BC | B0 | C1 |CB

B à 1 | 1B

C à 0 | 0C

 

• G₅(L₅={0⁺+(1⁺+0⁺)^*1}) = G(N=?, E=?, S=?, P=?)

N =  { S, A, B, C, D }

E = { 0, 1 }

S à AB1

A à 0 | A0

B à ∑ | CD | C0 | D1 | DC

C à 1 | 1C

D à 0 | 0D

The Chomsky Hierarchy

The Chomsky Hierarchy: Type 3

S  → aA

A → bcA|bc

L= {a(bc) ⁿ          n>0 }

1- abc

2- abcbc

3- abcbcbc

4- abcbcbcbc

5- abcbcbcbcbc

 

The Chomsky Hierarchy: Type 2

 

S  → Aba

A → aA|B

B → b

L={(a^m baⁿb)   m=1,0                   n>0}

1- Aab

2- aAab

3- aaAab

4- aaBab

5- aabab

 

 

 

The Chomsky Hierarchy: Type 1

 

S → aAbc

aA → aAb

A → a

L={(aabⁿc)       n>0 }

1- aAbc

2- aAbbc

3- aAbbbc

4- aAbbbbc

5- aabbbbc

 

The Chomsky Hierarchy: Type 0

 

S → aAb

A → aAb

aAb → c

L={(aⁿcbⁿ)                          n>1 }

1- aAb

2- aaAbb

3- aaaAbbb

4- aaaaAbbbb

5- aaaacbbbb